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Anand Mannargudi, a 12-year NVIDIA engineer, mentioned the transition from CoWoS (Chip on Wafer on Substrate) to CoWoP technology during an internal technical presentation.

The traditional CoWoS packaging approach consists of a die (die) containing the GPU core and HBM, an interposer, a package substrate, and finally a connection to the motherboard (platform PCB) via a BGA.

CoWoP eliminates the package substrate and BGA altogether, developing a "platform PCB" that allows the chip and interposer combination to be mounted directly on the motherboard. This allows chip signals to travel directly from the interposer to the motherboard, shortening interconnect paths and improving heat dissipation.

However, a recent report from a US-based foreign investment firm indicates that Nvidia's Rubin Ultra will not yet utilize CoWoP. This is because research from Japanese firm Ibiden indicates that the Rubin Ultra's ABF substrate is significantly larger than the Rubin and has more layers. Further reducing PCB line width/space (L/S) from 20/35 microns to below 10/10 microns would be extremely difficult.

To adopt CoWoP technology, PCB line width/space would need to be reduced to less than 10/10 microns to match the standards of current ABF substrates. US-based foreign investment firms indicate that the average L/S for HDI boards is currently 40/50 microns, while the average SLP (substrate-like PCB) used in iPhone motherboards is 20/35 microns.